IBM Unveils 0.7nm Chip Prototype With 100 Billion Transistors Using Novel 3D Nanostack Architecture
By
Jamie Redman
Summary
IBM has announced the world's first sub-1 nanometer chip technology at the 0.7 nm node, featuring a novel 3D transistor architecture called "nanostack" that stacks transistors vertically in two bonded layers. The prototype packs nearly 100 billion transistors onto a fingernail-sized chip and promises 70% better energy efficiency, extending Moore's Law beyond current silicon limits.
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Key quotes
· 3 pulledIBM on Thursday unveiled the world's first sub-1 nanometer chip technology, a research prototype at the 0.7 nanometer node that packs nearly 100 billion transistors onto a chip the size of a fingernail.
The announcement centers on what IBM calls the 'nanostack,' an entirely new three-dimensional transistor architecture developed at its semiconductor research facility in Albany, New York.
The design stacks and staggers transistors vertically in two bonded layers, using an ultra-thin dielectric material to separate them.
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