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First reported by bsky
IBM unveils sub-1 nanometre chip design, packing 100 billion transistors on a fingernail-sized surface

IBM's 3D chip prototype packs 100 billion transistors, doubling current density

By

Matthew Sparkes

17h ago· 5 min readenNews

Summary

IBM has announced a prototype chip that packs nearly 100 billion transistors onto a fingernail-sized 10mm x 15mm chip, nearly doubling the transistor count of the previous state-of-the-art. This breakthrough is achieved through a three-dimensional technique that adds a second layer of silicon circuitry. The chip promises 70% higher energy efficiency and 50% higher performance compared to current leading chips, though commercial availability is still 5-10 years away.

Source

Twitter / XIBM's 3D chip prototype packs 100 billion transistors, doubling current densitynewscientist.com

Key quotes

· 2 pulled
IBM's prototype chip is the size of a fingernail, yet packs in almost 100 billion transistors – nearly twice as many as the previous state-of-the-art chip – thanks to a three-dimensional technique.
The company says the 10 millimetre by 15 millimetre chip will offer 70 per cent higher energy efficiency and 50 per cent higher performance than current leading chips, and will be in commercial devices within 10 years.
Snippet from the RSS feed
IBM's latest chip packs in twice as many transistors as the current state-of-the-art chip by adding a second layer of silicon circuitry

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