Understanding the 80386's Early Start Memory Access and Its Implementation in the z386 FPGA Core
By
nand2mario
Summary
The article discusses the Early Start memory access technique used in Intel's 80386 processor, which hides memory latency by beginning the next instruction's address work during the last cycle of the current instruction. This feature contributed approximately 9% to overall performance but is also the source of the POPAD bug. The author describes implementing Early Start and other optimizations in their z386 FPGA core, which originally ran the 386 microcode without this feature.
Source
Hacker NewsUnderstanding the 80386's Early Start Memory Access and Its Implementation in the z386 FPGA Corenand2mario.github.ioKey quotes
· 5 pulledInstead of waiting for an instruction to reach its memory micro-op, the 386 begins the next instruction's address work — effective address, segment relocation, the bus cycle — in the last cycle of the current instruction.
Intel put it at about 9% of overall performance.
It is also the source of the POPAD bug.
The z386 FPGA core I released in May ran the original 386 microcode but didn't have early start.
Over the last month I added it along with a series of other optimizations, and z386 now rea
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