IBM's new chip packs 100 billion transistors with vertical 'nanostack' design

IBM has announced a major breakthrough in semiconductor technology, unveiling a sub-1 nanometer chip that packs nearly 100 billion transistors into an area the size of a fingernail. The transistor features are smaller than a DNA strand at 2.5 nanometers, though the architecture itself is built at the 0.7 nm (7 angstrom) node, according to Gizmodo. This new chip offers nearly twice the density of IBM's previous 2-nanometer chip from 2021. "IBM has announced the world's first sub-1 nanometer chip technology, featuring a revolutionary transistor architecture at the 0.7 nm (7 angstrom) node." Instead of shrinking transistors horizontally, IBM's design stacks them vertically using a novel approach. Hacker News reported that the company uses a "nanostack" 3D chip architecture, which allows more transistors per square millimeter and marks a major milestone as the industry approaches the physical limits of traditional scaling. The Register noted that IBM has also mapped a path down to 0.1 nm (1 angstrom) and expects commercial chips using the 0.7 nm process to reach markets within five years. The publication quoted the company as having "mapped a path down to 0.1 nm (1 Angstrom)," though the technology remains years away from mass production. "cram nearly 100 billion transistors onto a fingernail-sized die, almost double the density of its 2021 2 nm technology." IBM's achievement positions the company as a leader in advanced semiconductor research, promising more powerful and energy-efficient processors for the next decade. While the chip is still in the research phase, its vertical stacking and extreme density could redefine computing performance when it eventually reaches consumers.

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