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Reverse-engineering the Intel 8087: A look at microcode and register exchange

A detailed technical deep-dive into the Intel 8087 floating-point co-processor's microcode, specifically examining the register exchange operation. The article explains how the 8087 used microcode to implement complex floating-point algorithms, and is part of a reverse-engineerin

Insighttechnologyprogrammingcomputer architecture

righto.com·Hacker News: Front Page·1d ago·17 min read

Zero-Copy GPU Inference from WebAssembly on Apple Silicon: Direct Memory Sharing Between Wasm and GPU

Insighttechnologyprogrammingwebassembly

abacusnoir.com1mo ago

Universal Constraint Engine: Generating Emergent Neuromorphic Architectures from Declarative Rules

Insighttechnologyscienceartificial intelligence

zenodo.org1mo ago

Arm's Cortex X925 CPU Core: Achieving Desktop Performance Levels

Arm's Cortex X925 represents a significant leap in Arm's high-performance CPU core design, targeting desktop and laptop performance levels traditionally dominated by AMD and Intel. The article details how Arm has evolved from its low-power origins to develop complex cores capable

Insighttechnologyhardwarecomputer architecture

chipsandcheese.com·Hacker News: Front Page·2mo ago·20 min read

Understanding x86-64 CPU Register Architecture: From 16 General-Purpose to Hundreds of Physical Registers

This technical article explores the complex register architecture of x86-64 CPUs, explaining that while the ISA defines 16 general-purpose registers, the actual number is much higher when considering architectural, microarchitectural, and physical registers. The author details ho

Insighttechnologyprogrammingcomputer architecture

blog.yossarian.net·Hacker News: Front Page·3mo ago·13 min read

Analysis of Undocumented CPU Hardware Bugs and Design Flaws

The article discusses various CPU hardware bugs and design flaws found in vendor CPUs, focusing on specific examples like Intel's misspelled CPUIDs and other undocumented or poorly engineered features. The author shares observations about these mistakes that haven't been widely discussed, providing evidence and analysis to make these issues more publicly known.

Insighttechnologyprogramminghardware engineeringtaricorp.net·Hacker News: Front Page·3mo ago·4 min read

MpGEMM: Optimizing General Matrix Multiplication for ARM's Scalable Matrix Extension Architecture

Insighttechnologyprogrammingcomputer architecture

arxiv.org4mo ago

Technical Analysis of Intel 80386 Processor's Multiplication and Division Capabilities

Insighttechnologyprogrammingretro computing

nand2mario.github.io4mo ago

Technical Analysis of the Intel 8086 Processor's Arithmetic-Logic Unit Architecture

Insighttechnologyeducationhardware engineering

righto.com4mo ago

Flowchart of x86 Instruction Encoding: Prefixes and Escape Opcodes

This article presents a technical flowchart explaining x86 instruction encoding, specifically focusing on prefixes and escape opcodes. It details how x86 processors decode instructions through various maps (legacy map 0, legacy map 1, and extended maps), showing the decision flow from 1-byte instructions to more complex multi-byte encodings. The content cove

technologyprogrammingcomputer architecture

soc.me4mo ago

iRISC: A New Processor Architecture Combining RISC-V Open Source with Performance-Focused Design

The article discusses iRISC, a new processor architecture that combines RISC-V's open-source approach with Apple's performance-focused design philosophy. It aims to deliver high performance while maintaining energy efficiency, with features like a 10-stage pipeline, out-of-order execution, and support for advanced instruction sets. The architecture targets m

Newstechnologyprogrammingcomputer architecture

polysoftit.co.uk4mo ago

z8086: Recreating the Original Intel 8086 Processor Using Recovered Microcode

Insighttechnologyprogrammingcomputer architecture

nand2mario.github.io5mo ago

Raspberry Pi Boot Process: How It Differs from Traditional PC Booting

The article explains the unique boot process of Raspberry Pi devices, which differs significantly from traditional PC booting. Unlike PCs that use BIOS/UEFI, Raspberry Pi uses a firmware-driven boot sequence where the GPU (VideoCore) is powered first and serves as the root of tru

technologyprogrammingembedded systemspatrickmccanna.net·Hacker News: Front Page·5mo ago·3 min read

Reverse-Engineering the Intel 8087 Floating-Point Coprocessor's Stack Circuitry

Insighttechnologydesignhardware engineering

righto.com5mo ago

Reverse-engineering the Intel 8087: A look at microcode and register exchange

Zero-Copy GPU Inference from WebAssembly on Apple Silicon: Direct Memory Sharing Between Wasm and GPU

Universal Constraint Engine: Generating Emergent Neuromorphic Architectures from Declarative Rules

Understanding CPU Pipelining and Its Evolution into Branch Prediction

Tailslayer: C++ Library for Reducing RAM Tail Latency from DRAM Refresh Stalls

Understanding CPU Branch Prediction and Its Impact on Benchmarking

nCPU: AI-Native Computing Platform with Neural Network-Based Architecture

Arm's Cortex X925 CPU Core: Achieving Desktop Performance Levels

Understanding x86-64 CPU Register Architecture: From 16 General-Purpose to Hundreds of Physical Registers

Analysis of Undocumented CPU Hardware Bugs and Design Flaws

MpGEMM: Optimizing General Matrix Multiplication for ARM's Scalable Matrix Extension Architecture

Technical Analysis of Intel 80386 Processor's Multiplication and Division Capabilities

Technical Analysis of the Intel 8086 Processor's Arithmetic-Logic Unit Architecture

Flowchart of x86 Instruction Encoding: Prefixes and Escape Opcodes

iRISC: A New Processor Architecture Combining RISC-V Open Source with Performance-Focused Design

z8086: Recreating the Original Intel 8086 Processor Using Recovered Microcode

Raspberry Pi Boot Process: How It Differs from Traditional PC Booting

Reverse-Engineering the Intel 8087 Floating-Point Coprocessor's Stack Circuitry