Researchers build million-p-bit probabilistic computer by networking FPGAs, breaking single-chip limit

Summary

Researchers have built a programmable probabilistic computer using networked FPGAs that achieves one million p-bits (probabilistic bits), breaking the single-chip limit that previously constrained such systems. The machine performs Gibbs sampling at over a trillion flips per second while keeping all coupling weights in local on-chip memory, with devices exchanging only 1-bit boundary states. The study identifies a key timing ratio (eta = f_comm/f_p-bit) that determines how frequently boundary information must be refreshed for a distributed machine to behave as a monolithic one. Above a topology-dependent threshold, the distributed machine matches a GPU reference; below it, a quantifiable throughput-accuracy tradeoff emerges. The platform was demonstrated across spin glasses, Max-Cut, and Boolean satisfiability problems, providing a design rule for scaling probabilistic computers beyond single-chip limits.

Source

Hacker NewsResearchers build million-p-bit probabilistic computer by networking FPGAs, breaking single-chip limitarxiv.org