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CHERI vs OMA: Two Hardware Approaches to Memory Safety in Cybersecurity

By

yvdriess

7mo ago· 18 min readenInsight

Summary

This article examines two hardware-level approaches to address the systemic vulnerability of memory safety in computer systems: CHERI (Capability Hardware Enhanced RISC Instructions) and OMA (Object Memory Architecture). Both aim to make memory-unsafe code safe by design but take fundamentally different architectural paths. The piece analyzes their design differences and commercial implications against the backdrop of rising cybercrime costs, with credential abuse and vulnerability exploitation accounting for 42% of breaches according to the Verizon 2025 Data Breach Investigations Report.

Key quotes

· 5 pulled
The last year has been brutal for businesses globally. Taking examples from my home country, the UK, the cost is over £1B and still rising, as well as the loss of at least one life due to cybercrime.
These aren't isolated incidents - they're symptoms of a systemic vulnerability in how we build computer systems.
According to the Verizon 2025 Data Breach Investigations Report, credential abuse and exploitation of vulnerabilities continue to dominate as attack vectors, accounting for 22% and 20% of breaches respectively.
Two architectural approaches have emerged to tackle the trillion-dollar memory safety problem at the hardware level: CHERI (Capability Hardware Enhanced RISC Instructions) and OMA (Object Memory Architecture).
Both aim to make memory-unsafe code safe by design, but they take fundamentally different paths to get there.
Snippet from the RSS feed
Two architectural approaches have emerged to tackle the trillion-dollar memory safety problem at the hardware level: CHERI (Capability Hardware Enhanced RISC Instructions) and OMA (Object Memory Architecture). Both aim to make memory-unsafe code safe by d

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