Berkeley Out-of-Order Machine (BOOM): Open-Source RISC-V Processor Design
By
Bogdanp
Properly proved. Has structure, has flavour, has a point.
Summary
The Berkeley Out-of-Order Machine (BOOM) is an open-source RISC-V processor design inspired by the MIPS R10000 and Alpha 21264 out-of-order processors. It uses a unified physical register file design (explicit register renaming) and is implemented using the Chisel hardware construction language, which allows it to function as a generator for creating generalized RTL designs rather than a single fixed implementation.
Key quotes
· 4 pulledThe Berkeley Out-of-Order Machine (BOOM) is heavily inspired by the MIPS R10000 [1] and the Alpha 21264 [2] out–of–order processors.
Like the MIPS R10000 and the Alpha 21264, BOOM is a unified physical register file design (also known as 'explicit register renaming').
BOOM implements the open-source RISC-V ISA and utilizes the Chisel hardware construction language to construct generator for the core.
A generator can be thought of a generialized RTL design. A standard RTL design can be viewed as a single instance of
Article URL: https://docs.boom-core.org/en/latest/sections/intro-overview/boom.html
Comments URL: https://news.ycombinator.com/item?id=45745995
Points: 8
# Comments: 1
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